The disclosure relates to a method of fabricating a semiconductor device, and more particularly, to a semiconductor device having a vertical channel and to a method of fabricating such vertical channel in a semiconductor device.
Semiconductor devices having a recess-shape, a bulb-shape and a fin-shape have been developed in order to increase the channel area or channel length. Although the recess-shape semiconductor device, the bulb-shape semiconductor device and the pin-shape semiconductor device can acquire the desired channel length or channel area, there are difficulties in that complex patterns should be formed and cell efficiency should be considered.
Particularly, in the case of a semiconductor having a vertical channel by vertically aligning a source region and a drain region in a pillar pattern, the height of the pillar pattern is relatively high compared to its width. Thus, the pillar pattern may lean over an adjacent pillar pattern or even collapse.
FIG. 1 is a scanning electron microscopic (SEM) picture showing several defective pillar patterns in a semiconductor device known to the inventors.
Referring to FIG. 1, each pillar pattern 11 includes a pillar head 11A and a pillar neck 11B. Since a second width W2 of the pillar neck 11B is smaller than a first width W1 of the pillar head 11A, and due to the relatively high height of the pillar pattern, the pillar pattern's mechanical strength may not be sufficiently strong to sustain itself in the proper vertical orientation. As a result, the pillar pattern may collapse (12), or lean over (13) to adhere to neighboring pillar patterns.